Low-Voltage CMOS Circuits for Analog VLSI Programmable Neural Networks.

Document Type : Research Studies

Authors

1 Professor of Electronics & Communication Engineering Department., Faculty of Engineering., El- Mansoura University., Mansoura., Egypt.

2 Electronics & Communication Engineering Department., Faculty of Engineering.,El- Mansoura University., Mansoura., Egypt.

3 Senior Members IEEE., .Arabic Academy for Science & Technology and Maritime Transport, Alexandria.

Abstract

This paper presents an overview of designing an analog VLSI system used for handwritten recognition; namely a programmable neural network in linear as well as subthreshold CMOS technology. Synaptic weights are designed in the triode region. In addition, the processing element (PE) and the Tanh, activation function are designed in subthreshold region. Such subthreshold CMOS technology has some interesting features, such as high integration density, exponential transfer characteristics and low-power consumption. The proposed system is realized in a standard 0.8um CMOS technology and operated with a ± 1V power supply. 

Main Subjects